Direct Measurement Data Reduction for Scalable Parameter Extraction

This is an updated slideset of the one presented at the Europ. IC-CAP User Meeting in Prague, 2003,
by Pietro Brenner, Infineon Munich, and Franz Sischka, Agilent-EEsof.

It now features the LSYNC sweep of IC-CAP, available since IC-CAP 2006B, Update3 (Sept.2007)

Also, a new IC-CAP demo has been developed. See demo_features/1_BASIC_MDLG_EXAMPLES/24_Scaled_Parameters_Mdlg/scaled_parameterized_modeling.mdl

Introduction

What is the fastest way to get scalable model parameters for extensive transistor libraries without performing a lot of single transistor measurements and a lot of parameter extractions ?
Perform direct extraction of normalized parameters on normalized measurement data. Provided you know:

transistor layout measures,
vertical transistor geometry and transistor configurations,
absolute, geometry independent parameters (e.g. NF, VAF, VAR )and geometrically normalized parameters: e.g. is_a, is_p, cj_a, cj_p, re_a, rb_sh, rb_l
as well as the correct parameter scaling rules :
```
e.g.  IS = is_a * AREA_E  +  is_p * PERIM_E, 	 
CJ = cj_a * AREA_E  +  cj_p * PERIM_E, 	   
tf0 = tf0_a * (1+ a1*PERIM_E/AREA_E)
```

You can calculate parameter sets for arbitrary device geometries applying parameter calculation scripts (see e.g. Tradica /1/).

New Approach for Direct Extraction of Geometrically Normalized Device Parameters

Basic Idea

The basic idea for Direct extraction of Geometrically Normalized Device Parameters is as follows:

Measure DC- and C(V)-characteristics from a set of deviceswith different geometries, e.g.
- 3-5 different emitter lengths LE and
- 4-5 different emitter widths WE.
Transform measurements of device X Cx(v) into normalized per-area CAREAx(v) and per-perimeter CPERIMx(v) pseudo-measurements, e.g.
Perform multiple linear regression on equation (2) for each bias point vs. slope leads to perimeter-normalized meas.data CPERIM(v) and the intercept points lead to area-normalized meas.data CAREA(v).
Perform parameter extraction only on the normalized data plots CPERIM(v) and CAREA(v).
Only the parameters of the per-area and per-perimeter normalized capacitance pseudo-measurements have to be extracted.

Example: Diode DC Characteristics

Measure data of devices with different geometry as a function of area and perimeter.
In a second step, display the data as a function of area and perimeter, after a known scaling function like e.g.
From the y-axis intersect, calculate iaarea(v) and from the slope, calculate iaperimeter(v), for every individual 'v'.
Display the normalized per-area and per-perimeter measurements against the original stimulus.
Extract the per-area (IS_area, N_area) and per-perimeter parameters (IS_perim, N_perim)

NOTE: In the Plot 'Change of sweep order', the curves represent lines, provided that the prerequisite equation is fulfilled. As can be seen, for low va, i.e. low ia values, the noise overlies the prerequisite, and for high va values, i.e. the ohmic range of the diode current, the prerequisite is not met too.
Nevertheless, we can apply linfits to all traces of va, and later exclude those data in the parameter extractions behind the Plots 'y_intersects' and 'slopes'. See the specified parameter-extraction-boxes in these Plots.

NOTE:

If the traces represent lines with a positive slope, the meas. data include dependencies of both, area and perimeter.
If the traces in Plot 'Change of sweep order' represent flat lines (slope=0), then there is no dependency of perimeter for the meas. data.
If the traces represent lines with a negative slope, then the assumed (drawn) area and parameter values are not valid for the produced device on the wafer.
The area and perimeter are typically both smaller on the real device than in the drawn masks.
If the per-area parameters (Plot y-intersects) are negative, then the parimeter effect dominates the area effect, and thus, the prerequisite of splitting into area and perimeter is no longer valid.
For details on the area-perimeter scaling, see J.Berkner, Kompaktmodelle fuer Bipolartransistoren, Expert-Verlag, Renningen, Germany, ISBN 3-8169-2085-3, Chapter 7.1.2

Example: Diode CV Characteristics

IC-CAP Implementation

An IC-CAP Model file example has been developed for the proposed scaled modeling method,

for area and perimeter scaling,
DC and CV.
Other scaling functions can be implemented in a very similar way.

See demo_features/1_BASIC_MDLG_EXAMPLES/24_Scaled_Parameters_Mdlg/scaled_parameterized_modeling.mdl

Results

Diode DC Modeling Result, all devices
Measured (red) and simulated (blue) diode DC characteristics for all different geometries

NPN Junction Capacitance Modeling Result, all devices
Measured (red) BE and BC junction capacitance's and simulated (blue) ´BE and BC junction capacitances of all different geometries

Advantages of Direct Measurement Data Reduction

Advantages:

Best fit to measured data is implicitly given
Required measurement data processing is easy to implement
Single transistor parameter extraction on a few edge devices
Much lower effort and much faster parameter extraction

Requirements:

Scaling rules for device characteristics
Device characteristics must be measured for all devices at the same stimulus conditions
Availability of enough device geometries and geometry variations

Summary

Transforming measured data from a lot of different device geometries directly into per-area, per-perimeter and per-sheet normalized characteristics
- Saves plenty of parameter extraction work
- Gives automatically best fit to measurement data base
- Provides inherent information on data distribution → Statistics.
All of the required normalized parameters can be extracted with few efforts using intelligent test structures.
Using the presented simple test structures in production measurement setups (PCM) will lead to higher accuracy in determining important device parameters and will give excellent parameter statistics.

References

M. Schroeter, "TRADICA An Integrated Modeling Tool Linking Process And Circuit Design"Model Parameter Generation and Sizing of Integrated Bipolar Transistors. Manual Version 5. Nov. 2002.
J.Berkner, Kompaktmodelle fuer Bipolartransistoren, Expert-Verlag, Renningen, Germany, ISBN 3-8169-2085-3, Chapter 7.1.2

IC-CAP Modeling Handbook